Altera IP Compiler for PCI Express - Manual (Page 267)

Chapter 15: Testbench and Design Example 15–35
BFM Procedures and Functions
August 2014 Altera Corporation IP Compiler for PCI Express User Guide
ebfm_barwr Procedure
The ebfm_barwr procedure writes a block of data from BFM shared memory to an
offset from the specified endpoint BAR. The length can be longer than the configured
MAXIMUM_PAYLOAD_SIZE
; the procedure breaks the request up into multiple
transactions as needed. This routine returns as soon as the last transaction has been
accepted by the VC interface module.
ebfm_barwr_imm Procedure
The ebfm_barwr_imm procedure writes up to four bytes of data to an offset from the
specified endpoint BAR.
Table 15–23. ebfm_barwr Procedure
Location altpcietb_bfm_rdwr.v or altpcietb_bfm_rdwr.vhd
Syntax ebfm_barwr(bar_table, bar_num, pcie_offset, lcladdr, byte_len, tclass)
Arguments bar_table
Address of the endpoint bar_table structure in BFM shared memory. The bar_table
structure stores the address assigned to each BAR so that the driver code does not need
to be aware of the actual assigned addresses only the application specific offsets from the
BAR.
bar_num Number of the BAR used with pcie_offset to determine PCI Express address.
pcie_offset Address offset from the BAR base.
lcladdr BFM shared memory address of the data to be written.
byte_len
Length, in bytes, of the data written. Can be 1 to the minimum of the bytes remaining in
the BAR space or BFM shared memory.
tclass Traffic class used for the PCI Express transaction.
Table 15–24. ebfm_barwr_imm Procedure
Location altpcietb_bfm_rdwr.v or altpcietb_bfm_rdwr.vhd
Syntax ebfm_barwr_imm(bar_table, bar_num, pcie_offset, imm_data, byte_len, tclass)
Arguments bar_table
Address of the endpoint bar_table structure in BFM shared memory. The bar_table
structure stores the address assigned to each BAR so that the driver code does not need
to be aware of the actual assigned addresses only the application specific offsets from
the BAR.
bar_num Number of the BAR used with pcie_offset to determine PCI Express address.
pcie_offset Address offset from the BAR base.
imm_data
Data to be written. In VHDL, this argument is a std_logic_vector(31 downto 0). In
Verilog HDL, this argument is reg [31:0].In both languages, the bits written depend on
the length as follows:
Length Bits Written
4 31 downto 0
3 23 downto 0
2 15 downto 0
1 7 downto 0
byte_len Length of the data to be written in bytes. Maximum length is 4 bytes.
tclass Traffic class to be used for the PCI Express transaction.