Transaction layer errors, Transaction layer – Altera IP Compiler for PCI Express User Manual

Page 205

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Chapter 12: Error Handling

12–3

Transaction Layer Errors

August 2014

Altera Corporation

IP Compiler for PCI Express User Guide

Transaction Layer Errors

Table 12–4

describes errors detected by the transaction layer. Poisoned TLPs are

detected

Table 12–4. Errors Detected by the Transaction Layer (Part 1 of 3)

Error

Type

Description

Poisoned TLP received

Uncorrectable
(non-fatal)

This error occurs if a received transaction layer packet has the EP poison
bit set.

The received TLP is passed to the application and the application layer
logic must take appropriate action in response to the poisoned TLP. In
PCI Express 1.1, this error is treated as an advisory error. Refer to
“2.7.2.2 Rules for Use of Data Poisoning” in the

PCI Express Base

Specification 2.0

for more information about poisoned TLPs.

ECRC check failed

(1)

Uncorrectable
(non-fatal)

This error is caused by an ECRC check failing despite the fact that the
transaction layer packet is not malformed and the LCRC check is valid.

The IP core handles this transaction layer packet automatically. If the
TLP is a non-posted request, the IP core generates a completion with
completer abort status. In all cases the TLP is deleted in the IP core and
not presented to the application layer.

Unsupported request for
endpoints

Uncorrectable
(non-fatal)

This error occurs whenever a component receives any of the following
unsupported requests:

Type 0 configuration requests for a non-existing function.

Completion transaction for which the requester ID does not match the
bus/device.

Unsupported message.

A type 1 configuration request transaction layer packet for the TLP
from the PCIe link.

A locked memory read (MEMRDLK) on native endpoint.

A locked completion transaction.

A 64-bit memory transaction in which the 32 MSBs of an address are
set to 0.

A memory or I/O transaction for which there is no BAR match.

A memory transaction when the Memory Space Enable bit (bit [1] of
the PCI Command register at configuration space offset 0x4) is set to
0.

A poisoned configuration write request (CfgWr0)

If the TLP is a non-posted request, the IP core generates a completion
with unsupported request status. In all cases the TLP is deleted in the IP
core and not presented to the application layer.

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