Melsec-q – MITSUBISHI ELECTRIC QJ71C24N User Manual

Page 32

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MELSEC-Q

1 OVERVIEW

(8) Functions supporting multiple CPU systems (Details are explained

in the Reference Manual.)

(a) When accessing QCPUs in a multiple CPU system using the MC protocol or

through GX Developer, it is possible to perform data communication such as

reading/writing device data by specifying the QCPU to be accessed.

• When using the Q series C24 in a multiple CPU system, a QCPU

controlling the Q series C24 (hereinafter referred to as the control PLC)

should be specified using GX Developer.

It is also possible to mount a Q series C24 of function version A in a

multiple CPU system and access to the only control PLC (PLC No.1).

1) : PLC No.1
2) : PLC No.2
3) : PLC No.3
4) : PLC No.4

1 : Module controlled by

PLC No.1

2 : Module controlled by

PLC No.2

External device

Communication through GX Developer
Communication using the MC protocol

Setting from
GX Developer

Peripheral device

1

2

1

1) 2) 3) 4)

C24

Q series C24
control PLC

Q series C24
non-control PLCs

(b) When a Q series C24 CPU of function version B is used in a multiple CPU

system, the following forms of data communication can be performed with

the Q series C24.

1) It is possible to perform data communication using the non

procedure/bidirectional protocols from the control PLC

2) It is possible to read the buffer memory from non-control PLCs.

Input/output signals can be used as contacts.

Buffer memory

FROM/TO instruction
Dedicated instruction

FROM
instruction

Use the input/
output signal as
a contact

Use the input/
output signal as a
contact
It should be output
to an output signal

Data communication

Non-control PLC

Control PLC

Q series C24

External
device

X

Y

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