Panasonic MN103001G/F01K - Manual (Page 200)

Interrupt Controller
9-12
Group 4 interrupt control register
Register symbol: G4ICR
Address: x'34000110
Purpose: This register is used to enable group 4 interrupts, and to confirm interrupt requests and detection.
Bit No. 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Bit - G4 G4 G4 TMB TMA TM9 TM8 TMB TMA TM9 TM8 TMB TMA TM9 TM8
name LV2 LV1 LV0 IE IE IE IE IR IR IR IR ID ID ID ID
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Access R R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W R/W
Bit No. Bit name Description
0 TM8ID Timer 8 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
1 TM9ID Timer 9 underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
2 TMAID Timer A underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
3 TMBID Timer B underflow interrupt detection flag
0: No interrupt detected 1: Interrupt detected
4 TM8IR Timer 8 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
5 TM9IR Timer 9 underflow interrupt request flag
0: No interrupt request 1: Interrupt request
6 TMAIR Timer A underflow interrupt request flag
0: No interrupt request 1: Interrupt request
7 TMBIR Timer B underflow interrupt request flag
0: No interrupt request 1: Interrupt request
8 TM8IE Timer 8 underflow interrupt enable flag
0: Disabled 1: Enabled
9 TM9IE Timer 9 underflow interrupt enable flag
0: Disabled 1: Enabled
10 TMAIE Timer A underflow interrupt enable flag
0: Disabled 1: Enabled
11 TMBIE Timer B underflow interrupt enable flag
0: Disabled 1: Enabled
12 G4LV0 Group 4 interrupt priority level register (LSB)
13 G4LV1 Group 4 interrupt priority level register
14 G4LV2 Group 4 interrupt priority level register (MSB)
Set a level from 6 to 0.
15 — "0" is returned when this bit is read.