Panasonic MN103001G/F01K - Manual (Page 384)

I/O Ports
15-18
15.4.3 Pin Configurations
Table 15-4-1 shows the pin configurations for port 2.
Table 15-4-1 Port 2 Configuration
Port Pin P2n P2M = "1" P2M = "0"
No. P2nD = "1" P2nD = "0"
Port 2 87 P20 General-purpose output port General-purpose input port D8 * 1 Data input/output
84 P21 General-purpose output port General-purpose input port D9 * 1 Data input/output
83 P22 General-purpose output port General-purpose input port D10 * 1 Data input/output
82 P23 General-purpose output port General-purpose input port D11 * 1 Data input/output
81 P24 General-purpose output port General-purpose input port D12 * 1 Data input/output
80 P25 General-purpose output port General-purpose input port D13 * 1 Data input/output
78 P26 General-purpose output port General-purpose input port D14 * 1 Data input/output
77 P27 General-purpose output port General-purpose input port D15 * 1 Data input/output
[Note 1]
: When reset (in address/data separate mode)
"General-purpose input port" is selected in address/data multiplex mode .
*1 : In the event of a reset in address/data separate mode , the P2PU bit in the P2MD register is set
to "1" and the data pins (the 8 bits D[15:8]) are pulled up.
[Note 2]
Setting P2M to "0" in address/data multiplex mode , is prohibited.
[Note 3]
When the bus authority is granted, D15 to D8 go to high impedance.