Panasonic MN103001G/F01K - Manual (Page 83)

Extension Instruction Specifications
3-27
Bit 31 Bit 0
1 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
Dn before execution Dn after execution
Search range
Search direction
MSB LSB
BSCH (Bit search instruction)
[Instruction Format (Macro Name)]
BSCH Dm, Dn
[Assembler Mnemonic]
udf07 Dm, Dn
[Operation]
Bit search is performed within the bit string of the 32 bits contained in Dm from the bit position of the bit number
indicated by the contents of Dn - 1 in the direction that the bit number becomes smaller. The bit number of the first
bit position where a "1" is found is written into Dn.
When the contents of the lower 5 bits of Dn are 0, bit search is performed from bit 31 in the direction that the bit
number becomes smaller.
If search is performed up to the bit position of bit 0 without finding a "1", the C flag is set, Dn is set to 0x00000000,
and instruction execution ends.
When instruction execution starts, the upper 27 bits of Dn are ignored.
[Flag Changes]
When search was successful ("1" was found)
Flag Change Condition
V * Undefined
C 0 This indicates that search was successful.
N * Undefined
Z * Undefined
When search failed ("1" was not found)
Flag Change Condition
V * Undefined
C 1 This indicates that search failed.
N * Undefined
Z * Undefined
[Programming Cautions]
PSW updating by flag changes is delayed by one instruction.
However, Bcc and Lcc instructions can evaluate flags without waiting for flag reflection to PSW.
The operations of "udf07 imm8, Dn", "udf07 imm16, Dn" and "udf07 imm32, Dn" are not assured. In addition, a
system error interrupt does not occur in these cases.