Panasonic MN103001G/F01K - Manual (Page 288)

16-bit Timers
11-34
Once the counting operation is enabled, an underflow interrupt request is generated on a regular cycle. In addition,
with each interrupt the pin output is inverted and the value in TMnBR is loaded into TMnBC.
If the value in the TMnBR register is changed while the counting operation is in progress, this changed value is
loaded as the initial value the next time that an underflow is generated, and the interrupt cycle is then changed.
■ Procedure for ending operation
(1) Stop the timer counting operation.
Set TMnCNE to "0" in the TMnMD register, stopping the counting operation.
(2) Initialize the timer, if necessary.
If TMnLDE is set to "1" in the TMnMD register, the value that is set in TMnBR is loaded into TMnBC as
the initial value, and the timer output is reset. If TMnLDE is not set to "1" after the timer is stopped, the
binary counter and the pin output are maintained as they were before the timer was stopped. If TMnCNE
is set to "1" again, the count resumes from the state that was in effect immediately before the timer was
stopped.
Fig. 11-7-1 Interval Timer Operation
TMnBC value
Value set in
TMnBR
TMnCNE
Interrupt request
Timer output
x'0000