Panasonic MN103001G/F01K User Manual
Page 263
16-bit Timers
11-9
Timer 10 mode register
Register symbol: TM10MD
Address:
x'34001080
Purpose:
This register controls the operation of timer 10.
Bit No.
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
Bit
TM10 TM10 TM10 TM10 TM10
–
–
–
TM10 TM10
–
TM10
–
TM10 TM10 TM10
name
CNE LDE PME PM1 PM0
TGE ONE
CAE
CK2
CK1
CK0
Reset
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
Access
R/W
R/W
R/W
R/W
R/W
R
R
R
R/W
R/W
R
R/W
R
R/W
R/W
R/W
Bit No.
Bit name
Description
0
TM10CK0
Timer 10 clock source selection flag (LSB)
1
TM10CK1
Timer 10 clock source selection flag
2
TM10CK2
Timer 10 clock source selection flag (MSB)
These bits select the clock source for timer 10.
When pin input is selected, counting occurs at the rising edge of the pin input.
Note : For details on the clock sources for each timer, refer to Table 11-5-2, "16-bit
Timer Clock Sources."
3
—
"0" is returned when this bit is read.
4
TM10CAE
Counter clear enable flag
Enables/disables clearing of TM10BC when TM10BC and TM10CA match.
0: Do not clear. (TM10BC becomes a 16-bit free-running counter.)
1: Clear.
When TM10CA is set as a compare register;
TM10BC is cleared if TM10BC and TM10CA match.
When TM10CA is set as a capture register;
TM10BC is cleared when a capture occurs in TM10CA.
5
—
"0" is returned when this bit is read.
6
TM10ONE
One-shot operation enable flag
Enables/disables the halt of timer operation when TM10BC and TM10CA match.
0: Disables one-shot operation.
1: Enables one-shot operation.
If TM10BC and TM10CA match, the TM10CNE flag is reset and the timer
stops.