Panasonic MN103001G/F01K - Manual (Page 56)

2-22
CPU
[Stack Frame]
When an interrupt is accepted, a stack frame is allocated and the total 6 bytes of information in the PC and PSW are
saved in order to return from the interrupt. However, since the transfer of data across the 32-bit boundary is prohibited,
the SP value must constantly be set to a multiple of 4. Accordingly, a stack frame is allocated as shown in
Fig. 2-5-7 so that the SP value is constantly set to a multiple of 4. Ultimately, an 8-byte area with a total of 6 bytes
of information is saved.
Fig. 2-5-7 Stack Frame Configuration
SP (Before the interrupt)
PSW
PC (Return address)
SP (After the interrupt)
Smaller addresses
+3 4n +2 +1
(Rsv.)