Panasonic MN103001G/F01K - Manual (Page 93)

Extension Instruction Specifications
3-37
If a stack area is in the internal RAM, any error making potential condition shown on the following cases 4 to 12 is
not generated.
Memory access instruction accesses to
the space other than internal RAM
Lcc instruction
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the High-speed multiplication instruction
uses 32-bit immediate value is excluded.
The interrupt
occurrence
Case 3:
Instruction flow
Branch
RET instruction with stack area
outside internal RAM area
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the number of returned register by RET instruction is 0 or 1 is excluded.
And also the case where 2 registers are returned by RET instruction and the High-speed
multiplication instruction uses 32-bit immediate value is excluded.
The interrupt
occurrence
Case 4:
Instruction flow
Branch
RET instruction with stack area
outside internal RAM area
An 1-cycle executing instruction
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the number of returned register by RET instruction is 0, 1 or 2 is excluded.
And also the case where the High-speed multiplication instruction uses 32-bit immediate
value is excluded.
The interrupt
occurrence
Case 5:
Instruction flow
Branch
RETF instruction with stack area
outside internal RAM area
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the number of returned register by RETF instruction is 0 is excluded.
The interrupt
occurrence
Case 6:
Instruction flow
Branch
RETF instruction with stack area
outside internal RAM area
An 1-cycle executing instruction
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the number of returned register by RETF instruction is 0 is excluded.
And also the case where the High-speed multiplication instruction uses 32-bit immediate
value is excluded.
The interrupt
occurrence
Case 7:
Instruction flow
Branch
CALL instruction with stack area
outside internal RAM area
High-speed multiplication instruction
or Multiply-and-accumulate instruction
The case where the High-speed multiplication instruction uses 32-bit immediate value is excluded.
The interrupt
occurrence
Case 8:
Instruction flow
Branch