Panasonic MN103001G/F01K - Manual (Page 283)

16-bit Timers
11-29
If the value in the TM10CA register is changed while the counting operation is in progress, the value in the buffer
is loaded into the compare register the next time that TM10BC is cleared, and the interrupt cycle is then changed. If
the interrupt cycle will be changed while the counting operation is in progress, set TM10CA as a double-buffer
compare register.
■ Procedure for ending operation
(1) Stop the timer counting operation.
Set TM10CNE to "0" in the TM10MD register, stopping the counting operation.
(2) Initialize the timer, if necessary.
If TM10LDE is set to "1" in the TM10MD register, TM10BC is cleared and the timer output is reset. If the
TM10CA register is set as a double-buffer, the value in the compare register buffer is loaded into the
compare register.
If TM10LDE is not set to "1" after the timer is stopped, the binary counter, the compare register and the pin
output are maintained as they were before the timer was stopped. If TM10CNE is set to "1" again, the
count resumes from the state that was in effect immediately before the timer was stopped.
Fig. 11-6-11 Timer 10 Interval Timer Operation (1)
Fig. 11-6-12 Timer 10 Interval Timer Operation (2)
TM10BC value
Value set in
TM10CA
TM10CNE
x'0000
Compare/capture A
interrupt request
TM10BC value
Value set in
TM10CA
TM10CNE
x'0000
Change in the value
set in TM10CA
If "double-buffer" is set, the value in the buffer is
loaded into the register when the values match.
Compare/capture A
interrupt request