Panasonic MN103001G/F01K - Manual (Page 46)

2-12
CPU
2.4.3 Instruction Set
The instruction set has a simple organization, and features the generation of compact and optimized code through a
C compiler.
The instruction code size is reduced by making the basic instruction word length one byte. As a result, increases in
the code size of the assembler program can be kept to a minimum even though the instruction set is simple, with
data transfers to and from memory limited to load and store operations.
Table 2-4-3 Instruction Types (All 46 types and extension instructions)
• Transfer instructions
MOV Transfer of word data between registers
Transfer of word data between registers and the memory
Transfer of immediate values to registers
MOVBU Transfer of byte data between registers and the memory
(zero-extension)
MOVHU Transfer of halfword data between registers and the memory
(zero-extension)
EXT 64-bit sign-extension of word data
EXTB 32-bit sign-extension of byte data
EXTBU 32-bit zero-extension of byte data
EXTH 32-bit sign-extension of halfword data
EXTHU 32-bit zero-extension of halfword data
MOVM Transfer between multiple registers and the memory
CLR Data clear
• Arithmetic instructions
ADD Addition
ADDC Addition with carry
SUB Subtraction
SUBC Subtraction with borrow
MUL Signed multiplication
MULU Unsigned multiplication
DIV Signed division
DIVU Unsigned division
INC Increment by 1
INC4 Increment by 4
• Compare instructions
CMP Compare
• Logical instructions
AND And
OR Inclusive Or
XOR Exclusive Or
NOT Not (complement of 1)