Panasonic MN103001G/F01K - Manual (Page 418)

I/O Ports
15-52
15.11.3 Pin Configurations
Table 15-11-1 shows the pin configurations for port 9.
Table 15-11-1 Port 9 Configuration
Port Pin P9n P9nM = "1" P9nM = "0"
No. P9nD = "1" P9nD = "0"
Port 9 43 P90 General-purpose output port General-purpose input port EXMOD0 Extension mode setting input 0
42 P91 General-purpose output port General-purpose input port EXMOD1 Extension mode setting input 1
40 P92 General-purpose output port RE Memory read signal output
39 P93 General-purpose output port WE0 Memory write signal output
38 P94 General-purpose output port WE1 Memory write signal output
37 P95 General-purpose output port General-purpose input port DK Data acknowledge signal input
36 P96 General-purpose output port General-purpose input port BR Bus authority request signal input
34 P97 General-purpose output port SYSCLK System clock output
[Note 1]
: When reset (whether in address/data separate mode or address/data multiplex mode)
[Note 2]
When the bus authority is granted, WE1, WE0, and RE go to high impedance.