Panasonic MN103001G/F01K - Manual (Page 28)

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General Specifications
1.1 Overview
The MN1030 Series is a 32-bit microcontroller that maintains the software assets of Matsushita Electronics' 16-bit
MN102 Series of microcontrollers by offering ease of use and excellent cost-performance with a simple, high-
performance architecture.
Built around a compact 32-bit CPU core with a basic instruction word length of one byte, the MN103001G (mask
ROM version) includes ROM, RAM, a bus control circuit, interrupt control circuit, timers, a serial interface, A/D
converter, and input/output ports in a 100-pin QFP. The MN1030F01K (flash memory version) is equipped with
flash memory instead of mask ROM, has the same on-chip peripheral functions as the MN103001G, and has the
same package and pin specifications. This microcontroller is ideal for multimedia devices, which must be able to
process large volumes of data (for audio, stills, video, etc.), as well as for real-time control equipment that requires
fast and precise control. When supplied with power supply voltage of 3.3 V, the MN103001G operates at
60 MHz and achieves performance of 60 MIPS.
1.2 Features
Low voltage, high-speed processing, low power consumption
■ Minimum instruction execution time:
16.7 ns (during 3.3 V internal 60 MHz operation *MN103001G)
25 ns (during 3.3 V internal 40 MHz operation *MN1030F01K)
■ Power consumption (TYP.):
300 mW (during 3.3 V internal 60 MHz operation *MN103001G)
270 mW (during 3.3 V internal 40 MHz operation *MN1030F01K)
Compact and high-performance CPU core
■ Simple and highly efficient instruction set
(Number of basic instructions: 46; number of extension instructions: 24; number of addressing modes: 6)
■ Excellent coding efficiency with instructions that have a basic word length of one byte
■ Load/store architecture with 5-stage pipeline organization provides fast instruction execution
■ High-speed branch processing
■ Supports linear address space of up to 4 GB
(External extension 8 Mbytes x 4 = 32 Mbytes)
Extension operation functions
■ Multiply-and-accumulate operation instructions (32 bits x 32 bits + 64 bits = 64 bits; throughput: 2
clocks)
■ Saturation operation instructions
■ Bit search instructions
■ Swap instructions
Large on-chip memory
■ 128 Kbytes of on-chip ROM/256 Kbytes of flash memory
■ 8 Kbytes of on-chip RAM (for data storage)
Flexible clock control
■ Self-excited/externally excited oscillation
• Maximum 60 MHz internal operation when a 15-MHz oscillator is connected or a 15-MHz clock
is input (in the case of the MN103001G)
• Can switch between using PLL (programmable: multiply by four, multiply by two, multiply by
one)/not using PLL (divide by two)
■ Low power consumption mode
• HALT, STOP, SLEEP mode