1 interval timer and timer output – Panasonic MN103001G/F01K User Manual

Page 287

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16-bit Timers

11-33

11.7 Description of Operation of Timers 11, 12, and 13

This section describes the operation of timers 11, 12, and 13.

Timers 11, 12, and 13 have built-in registers for setting the initial values, and down-counters. These timers can be
used as interval timers and as event counters.

11.7.1

Interval Timer and Timer Output

When using timers 11, 12, or 13 as an interval timer, make the settings according to the procedure described below.
These interval timers generate interrupts on the cycle that is set. (Refer to Figs. 11-7-1 to 11-7-3.)

Procedure for initiating operation

(1) Set the timer division ratio.

Set the division ratio in TMnBR.

The interrupt cycle is then

(value set in TMnBR + 1) x clock source cycle.

(2) Select the clock source.

Select the clock source through TMnCK[2:0] in the TMnMD register. When using 1/8IOCLK or 1/32IOCLK
as the clock source, set TMPSCNE in the TMPSCNT register to "1" to enable prescaler operation before

enabling the counting operation for timers 11, 12, or 13.

(3) Initialize the timer.

Set TMnLDE to "1" in the TMnMD register to initialize timer n.

The value set in TMnBR is loaded into TMnBC as the initial value, and the timer output is reset.

After initialization, be certain to set TMnLDE to "0" to return to normal operation mode.

(4) Set the I/O port (when using timer output).

Set the I/O port to "timer output pin."

In the I/O port register, select "timer output" for the output signal and then set the output pin.

For details on the I/O port register settings, refer to chapter 15, "I/O Ports."

(5) Enable the timer counting operation.

The counting operation starts when the TMnCNE in the TMnMD register is set to "1".

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