Panasonic MN103001G/F01K User Manual
Page 65
Extension Instruction Specifications
3-9
GETCLX (Register low-order 32-bit transfer instruction for multiply-and-accumulate operation: Store)
[Instruction Format (Macro Name)]
GETCLX Dn
[Assembler Mnemonic]
udf13 Dn, Dn
[Operation]
This instruction transfers the contents of the multiply-and-accumulate register MCRL to Dn.
The contents of the multiply-and-accumulate overflow detect register MCVF are set in the V flag.
[Flag Changes]
When multiply-and-accumulate operation overflow was not detected (MCVF = 0)
Flag
Change
Condition
V
0
Indicates that the multiply-and-accumulate operation is valid.
C
0
Always 0
N
*
Undefined
Z
*
Undefined
When multiply-and-accumulate operation overflow was detected (MCVF = 1)
Flag
Change
Condition
V
1
Indicates that the multiply-and-accumulate operation is invalid.
C
0
Always 0
N
*
Undefined
Z
*
Undefined
[Programming Cautions]
There is a one-instruction delay in the updating of the PSW to reflect flag changes.
However, the Bcc and Lcc instructions can evaluate the flags without waiting for the flag changes to be reflected in
the PSW.
When "udf13 Dm, Dn" is operated, Dm is ignored.
The operations of "udf13 imm8, Dn", "udf13 imm16, Dn" and "udf13 imm32, Dn" are not assured. In addition, a
system error interrupt does not occur in these cases.