Panasonic MN103001G/F01K - Manual (Page 90)

Extension Instruction Specifications
3-34
(c) Note on the description of byte data multiply-and-accumulate instructions and MCRH, MCRL access instructions
When executing a byte data multiply-and-accumulate instruction followed by an MCRH, MCRL access instruction,
the result produced by the byte data multiply-and-accumulate instruction is used in the execution of the subsequent
MCRH, MCRL access instruction. Therefore, it is essential to not initiate the subsequent MCRH, MCRL access
instruction until after the result that is required from the byte data multiply-and-accumulate instruction has been
output. As a result, one cycle must be inserted between the byte data multiply-and-accumulate instruction and the
subsequent MCRH, MCRL access instruction.
This note applies to the following instructions:
<Byte data multiply-and-accumulate instructions>
MACB instruction, MACBU instruction
<MCRH, MCRL access instructions>
PUTCX instruction, CLRMAC instruction, GETCHX instruction, GETCLX instruction
DEC
EX
MEM
WB
Instruction decoding
Operation
Instruction
decoding
Operation
MCRH, MCRL access instruction
Insert one cycle
M ul t i pl y - a nd - a c c u m ul a t e
instruction has output the result
that is required by MCRH, MCRL
access instruction
Result can be
referenced
Byte data
Multiply-and-accumulate instruction