Panasonic MN103001G/F01K - Manual (Page 41)

2-7
CPU
2.3.2 Control Registers
This microcontroller uses the memory-mapped-I/O method and allocates the peripheral circuit registers to the
internal I/O space between addresses x'20000000 and x'3FFFFFFF.
The registers listed below are described in this section. For details on other control registers, refer to the respective
sections that explain the various internal peripheral functions.
Table 2-3-1 List of Control Registers
Address Name Symbol Number of bits Initial value Access size
x'20000000 Interrupt vector register 0 IVAR0 16 x'XXXX 16
x'20000004 Interrupt vector register 1 IVAR1 16 x'XXXX 16
x'20000008 Interrupt vector register 2 IVAR2 16 x'XXXX 16
x'2000000C Interrupt vector register 3 IVAR3 16 x'XXXX 16
x'20000010 Interrupt vector register 4 IVAR4 16 x'XXXX 16
x'20000014 Interrupt vector register 5 IVAR5 16 x'XXXX 16
x'20000018 Interrupt vector register 6 IVAR6 16 x'XXXX 16
x'20000020 Core's internal memory control register MEMCTRC 16 x'0007 16
x'20000040 CPU mode register CPUM 16 x'0000 16