Panasonic MN103001G/F01K - Manual (Page 76)

Extension Instruction Specifications
3-20
MACBU (Unsigned byte data multiply-and-accumulate operation instruction: between registers)
[Instruction Format (Macro Name)]
MACBU Dm, Dn
[Assembler Mnemonic]
udf33 Dm, Dn
[Operation]
This instruction performs the multiply-and-accumulate operation using the multiplier and adder in the extension
function unit.
The instruction multiplies the contents of Dm (unsigned 8-bit integer: multiplicand) by the contents of Dn (unsigned
8-bit integer: multiplier), adds the resulting product to the 32-bit cumulative sum that is stored in the multiply-and-
accumulate register MCRL, and then stores the new resulting 32-bit cumulative sum back in multiply-and-accumulate
register MCRL.
If an overflow from the 32-bit cumulative sum data is generated when the product is added to the cumulative sum,
multiply-and-accumulate overflow detection flag 1 is output to register MCVF.
[Flag Changes]
Flag Change Condition
V –
C –
N –
Z –
[Programming Cautions]
A non-extension instruction that consumes at least one cycle must be inserted between this instruction and the next
extension instruction.