Altera 10-Gbps Ethernet MAC MegaCore Function User Manual
Page 119
Chapter 8: Registers
8–25
Register Initialization
February 2014
Altera Corporation
10-Gbps Ethernet MAC MegaCore Function User Guide
Figure 8–1
shows the settings for the rx_frame_control register.
d. Enable MAC transmit and receive datapath.
//Enable the MAC Receive Path
//rx_transfer_control byte address: 0x000
rx_transfer_control (address = 0x00000000) = 0x0
//Enable the MAC Transmit Path
//tx_transfer_control byte address: 0x4000
tx_transfer_control (address = 0x00004000) = 0x0
//Check the Transmit and Receive Path is enable
//rx_transfer_status byte address: 0x004
Wait rx_transfer_status (address = 0x00000004) = 0x0
//tx_transfer_status byte address: 0x4004
Wait tx_transfer_status (address = 0x00004004) = 0x0
Figure 8–1. Rx_frame_control Register Settings
Reser
ve
d
EN_SUPP3
EN_SUPP2
EN_SUPP1
EN_SUPP0
Reser
ve
d
IGNORE_P
A
USE
FWD_P
A
USE
FWD_CONTR
OL
Reser
ve
d
EN_ALLMCAST
EN_ALLUCAST
30..20
19
18
17
16
15..6
5
4
3
2
1
0
0..0
0
0
0
0
0..0
0
0
0
0
1
0