Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 54)

Chapter 5: 1G/10GbE MAC Design Example 5–9
1G/10GbE Testbench
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
5.5.4. 1G/10GbE Testbench Simulation Flow
The 1G/10GbE testbench provides two modes for simulation:
■ 1G/10Gb Ethernet mode
■ Backplane-KR mode
By default the testbench runs in 1G/10Gb Ethernet mode.
To switch to backplane-KR mode, open the tb.sv file and specify the
MODE_1G10G_KR_BAR
parameter to 0.
5.5.4.1. 1G/10Gb Ethernet Mode
Upon a simulated power-on reset, the testbench performs the following operations:
1. Initializes the DUT by configuring the following options through the Avalon-MM
interface:
a. Changes both channel 1 and channel 0 to be operating speed at 10 Gbps.
b. Configures the MAC. In the MAC, enables address insertion on the transmit
path and sets the transmit primary MAC address to EE-CC-88-CC-AA-EE.
c. In the TX and RX FIFO buffers (Avalon-ST Single Clock FIFO core), enables
drop on error.
d. Waits for both the MAC and PHY to be ready to receive data.
2. Starts packet transmission. The testbench sends a total of eight packets:
a. Three 64-byte basic Ethernet frames
b. 1518-byte VLAN frame
c. 1518-byte basic Ethernet frame
d. 64-byte stacked VLAN frame
e. 500-byte VLAN frame
f. 1518-byte stacked VLAN frame
3. Displays the MAC statistics in the transcript panel.
4. Changes the operating speed for both channels.
a. Changes the operating speed for both channels to 1 Gbps.
b. Disables clause 37 auto-negotiation for both channels.
c. Waits for both the MAC and PHY to be ready to receive data
5. Starts packet transmission. The testbench sends a total of eight packets:
a. Three 64-byte basic Ethernet frames
b. 1518-byte VLAN frame
c. 1518-byte basic Ethernet frame
d. 64-byte stacked VLAN frame
e. 500-byte VLAN frame
f. 1518-byte stacked VLAN frame