Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 43)

Chapter 4: 10GbE MAC with IEEE1588v2 Design Example 4–5
10GbE with IEEE 1588v2 Testbench
February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
8. Click Generate to generate the simulation and synthesis files.
4.5. 10GbE with IEEE 1588v2 Testbench
Altera provides testbench for you to verify the 10GbE with IEEE 1588v2 design
example. The following sections in this document describe the testbench, its
components, and use.
4.5.1. 10GbE with IEEE 1588v2 Testbench
The testbenches operate in loopback mode. Figure 4–3 shows the flow of the packets.
4.5.2. 10GbE with IEEE 1588v2 Testbench Components
The testbenches comprise the following modules:
■ Device under test (DUT)—the design example.
■ Avalon driver—uses Avalon-ST bus functional models (BFMs) to exercise the
transmit and receive paths. The driver also utilizes the Avalon-MM BFM to access
the Avalon-MM interfaces of the design example components.
■ Packet monitors—monitors the transmit and receive datapaths, and displays the
frames in the simulator console.
Figure 4–3. Testbench
Loopback
on XGMII
Testbench
Avalon-MM
Avalon-MM
Control
Register
Avalon-ST
Transmit
Frame
Generator
Avalon-ST
Receive
Frame
Monitor
Ethernet
Packet
Monitor
Ethernet
Packet
Monitor
DUT
avalon_bfm_wrapper.sv
Avalon Driver
Avalon-ST
Avalon-ST