Address insertion, Frame check sequence (crc-32) insertion – Altera 10-Gbps Ethernet MAC MegaCore Function User Manual
Page 73
7–6
Chapter 7: Functional Description
Transmit Datapath
10-Gbps Ethernet MAC MegaCore Function User Guide
February 2014
Altera Corporation
You can disable pad bytes insertion by setting the tx_padins_control register to 0.
When disabled, the MAC IP forwards the frames to the receiver without checking the
frame length. Ensure that the minimum payload length is met; otherwise the current
frame may get corrupted. You can check for undersized frames by referring to the
statistics collected.
7.4.2. Address Insertion
By default, the MAC TX retains the source address received from the client. You can
configure the MAX TX to replace the source address with the primary MAC address
specified in the tx_addrins_macaddr0 and tx_addrins_macaddr1 registers by setting
the bit tx_addrins_control[0] to 1.
7.4.3. Frame Check Sequence (CRC-32) Insertion
The MAC TX computes and inserts CRC-32 checksum into transmit frames. The MAC
TX computes the CRC-32 checksum over the frame bytes that include the source
address, destination address, length, data, and pad bytes. The CRC checksum
computation excludes the preamble, SFD, and FCS bytes.
The following equation shows the CRC polynomial, as specified in the IEEE 802.3
Standard:
The 32-bit CRC value occupies the FCS field with X
31
in the least significant bit of the
first byte. The CRC bits are thus received in the following order: X
31
, X
30
,..., X
1
, X
0
.
You can disable this function by setting the bit tx_crcins_control[1] to 0. You can
also choose to omit the logic for CRC computation and insertion to save resources.
When you disable or omit the CRC computation and insertion, the MAC does not
append the CRC bits to the automatically generated pause frames.
shows the timing diagram of the Avalon-ST transmit and
receive interface where the FCS insertion function is on. The MAC TX receives the
frame without CRC-32 checksum and inserts CRC-32 checksum (4EB00AF4) into the
frame. The frame is then loopback to the receive datapath with the
avalon_st_rx_data[63:0]
containing the CRC-32 checksum.
FCS(X)
X
32
X
26
X
23
X
22
X
16
X
12
X
11
X
10
X
8
X
7
X
5
X
4
X
2
X
1
1
+
+
+
+
+
+
+
+
+
+
+
+
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+
=