Altera 10-Gbps Ethernet MAC MegaCore Function - Manual (Page 7)

February 2014 Altera Corporation 10-Gbps Ethernet MAC MegaCore Function User Guide
1. About This IP Core
The 10-Gbps Ethernet (10GbE) Media Access Controller (MAC) IP core is a
configurable component that implements the IEEE 802.3-2008 specification. The IP
core offers the following modes:
■ 10 Gbps mode—uses the Avalon ® Streaming (Avalon-ST) interface on the client
side and the single data rate (SDR) XGMII on the network side.
■ 1 Gbps/10 Gbps mode— uses the Avalon-ST interface on the client side and
GMII/SDR XGMII on the network side.
■ 10 Mbps/100 Mbps/1 Gbps/10 Gbps (10M-10G) mode—uses the Avalon-ST
interface on the client side and MII/GMII/SDR XGMII on the network side.
To build a complete Ethernet subsystem in an Altera ® device and connect it to an
external device, you can use the 10GbE MAC IP core with an Altera PHY IP core such
as a soft XAUI PHY in FPGA fabric, hard silicon-integrated XAUI PHY, a 10GBASE-R
PHY, a Backplane Ethernet 10GBASE-KR PHY, or a 1G/10 Gbps Ethernet PHY IP.
Figure 1–1 illustrates a system with the 10GbE MAC IP core.
1.1. Features
The 10GbE MAC supports the following features:
■ Operating modes: 10 Mbps, 100 Mbps, 1 Gbps and 10 Gbps.
■ Support for full duplex only.
■ Avalon-ST 64-bit wide client interface running at 156.25 MHz.
■ Direct interface to 4-bit MII running at 125 MHZ with clock enable; 2.5 MHz for
10 Mbps and 25 MHz for 100 Mbps.
■ Direct interface to 8-bit GMII running at 125 MHZ.
■ Direct interface to 64-bit SDR XGMII running at 156.25 MHZ.
■ Virtual local area network (VLAN) and stacked VLAN tagged frames filtering as
specified by IEEE 802.IQ and 802.1ad (Q-in-Q) standards respectively.
Figure 1–1. Typical Application of 10GbE MAC
Avalon-ST
Interface
Client
Module
Altera FPGA
10GbE MAC or
1G/10GbE MAC or
10M/100M/
1000M/10GbE MAC
External PHY
XAUI or
10GBASE-R or
Backplane Ethernet
10GBASE-KR PHY or
1G/10Gbps Ethernet
SDR XGMII/
GMII/MII
Serial
Interface