Quantum Data 881 - Manual (Page 471)

881/882 Video Test Generator User Guide (Rev A.22) 453
Running the Link Layer compliance test for DisplayPort
sink devices
The 882E supports the running of a Link Layer compliance test on DisplayPort sinks.
Overview
The Link Layer compliance test system enables developers of DisplayPort products to
perform a fast and comprehensive Link Layer compliance test. Because the 882E can
emulate DisplayPort Link Layer sources devices it can perform a complete Link Layer
compliance test on any sink.
The Link Layer compliance test can be run entirely through the 882E front panel or
through the command line. The DisplayPort commands enable you to run a specific
subset of the tests in the series of tests.
Note: While running the link layer compliance test, you can monitor the transactions using
the Auxiliary Channel Analyzer (ACA) application. Refer to “
Monitoring the DisplayPort
auxiliary channel ” on page 504.
The following table describes the sink link layer compliance tests that can be performed.
Index Test Description
0 5.2.1.1 Read One Byte from Valid DPCD Address
1 5.2.1.2 Read Twelve Bytes from Valid DPCD Address
2 5.2.1.3 Write One Byte to Valid DPCD Address
3 5.2.1.4 Write Nine Bytes to Valid DPCD Addresses
4 5.2.1.5 Write Nine Bytes to Read-Only DPCD Address
5 5.2.1.6 Write EDID Offset (One Byte I 2 C-Over-Aux
Write)
6 5.2.1.7 Read One EDID Byte (One Byte I 2 C-Over-Aux
Read)
7 5.2.1.8 EDID Read (1 Byte I 2 C-Over-Aux Segment
Write, 1 Byte I 2 C-Over-Aux Offset Write, 128
Byte I 2 C-Over-Aux Read)
8 5.2.1.9 Illegal Aux Request Syntax
9 5.2.2 EDID Read
10 5.3.1.1 Successful Link Training at All Supported Lane
Counts and Link Speeds
11 5.3.1.2 Successful Link Training with Request of
Higher Differential Voltage Swing during Clock
Recovery Sequence