Altera Stratix V Avalon-ST - Manual (Page 106)

Bits Register Description Default Value Access
[15] Function-Level Reset. Writing a 1 to this bit generates a Function-
Level Reset for this VF. Only functional when the PF Device
Capabilities Register FLR Capable bit is set. This bit always reads
as 0.
0 RW
Status Register
[16] Correctable Error Detected. 0 RW1C
[17] Non-Fatal Error Detected. 0 RW1C
[18] Fatal Error Detected. 0 RW1C
[19] Unsupported Request Detected. 0 RW1C
[20] Not implemented. 0 RO
[21] Transaction Pending. When set, indicates that a Non-Posted
request issued by this VF is still pending.
0 RO
[31:22] Reserved. 0 RO
5-32 Virtual Function Registers
UG-01097_sriov
2014.12.15
Altera Corporation Registers
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