Altera Stratix V Avalon-ST User Manual

Page 23

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Parameter

Value

Description

Minimum RX Buffer credit allocation—configures the

minimum PCIe specification allowed for non-posted and

posted request credits, leaving most of the RX Buffer space

for received completion header and data. Select this option

for variations where application logic generates many read

requests and only infrequently receives single requests

from the PCIe link.

Low—configures a slightly larger amount of RX Buffer

space for non-posted and posted request credits, but still

dedicates most of the space for received completion header

and data. Select this option for variations where application

logic generates many read requests and infrequently

receives small bursts of requests from the PCIe link. This

option is recommended for typical endpoint applications

where most of the PCIe traffic is generated by a DMA

engine that is located in the endpoint application layer

logic.

Balanced—configures approximately half the RX Buffer

space to received requests and the other half of the RX

Buffer space to received completions. Select this option for

variations where the received requests and received

completions are roughly equal.

High—configures most of the RX Buffer space for received

requests and allocates a slightly larger than minimum

amount of space for received completions. Select this

option where most of the PCIe requests are generated by

the other end of the PCIe link and the local application

layer logic only infrequently generates a small burst of read

requests. This option is recommended for typical root port

applications where most of the PCIe traffic is generated by

DMA engines located in the endpoints.

Maximum—configures the minimum PCIe specification

allowed amount of completion space, leaving most of the

RX Buffer space for received requests. Select this option

when most of the PCIe requests are generated by the other

end of the PCIe link and the local application layer logic

never or only infrequently generates single read requests.

This option is recommended for control and status

endpoint applications that don't generate any PCIe

requests of their own and only are the target of write and

read requests from the root complex.

UG-01097_sriov

2014.12.15

System Settings

3-3

Parameter Settings

Altera Corporation

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