Interrupt interface – Altera Stratix V Avalon-ST User Manual

Page 49

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Table 4-7: Function-Level Reset Interface

Signal

Direction

Description

flr_active_pf[<n>-

1:0]

Output

When asserted, indicates the PF FLR field (bit 15) of the Device

Control Register is set. When asserted, a PF is being reset. (Bit 0

is for PF0. Bit 1 is for PF1).
The Application Layer must monitor

flr_active_pf[<n>-1:0]

and clear any pending transactions associated with the function

being reset. The Application Layer must then assert

flr_

completed_pf

.

flr_completed_pf[<n>-

1:0]

Input

When asserted for one or more cycles, indicates that the Applica‐

tion Layer has completed resetting all the logic associated with

the PF. (Bit 0 is for PF0. Bit 1 is for PF1). When

flr_active_pf

is asserted, the Application Layer must assert

flr_completed

within 100 microseconds to re-enable the function.

flr_active_vf[<n>-

1:0]

Output

Asserting bit <n> indicates a 1 was written into the FLR field (bit

15) of the Device Control Register for VF<n>. When asserted,

indicates that VF <n> is being reset. Multiple VFs can be reset

simultaneously. Consequently, the Application Layer must

monitor each bit of this output port in parallel.
The Application Layer must clear any pending transactions

associated with the VF being reset. It must then assert the

corresponding bit of

flr_completed

to signal to indicate it is

ready to re-enable the VF.
<n> is the total number of VFs.

flr_completed_vf[<n>-

1:0]

Input

Asserting bit <n> for one or more cycles indicates that the

Application Layer has completed resetting all the logic associated

with VF <n>.
When

flr_active_vf<n>

is asserted, the Application Layer it

must assert the corresponding bit of

flr_completed

within 100

microseconds to re-enable the VF.
<n> is the total number of VFs.

Related Information

Function Level Reset (FLR)

on page 6-5

Interrupt Interface

The SR-IOV Bridge supports MSI and MSI-X interrupts for both Physical and Virtual Functions. It also

supports legacy Interrupts for Physical Functions. The Application Layer can use this interface to generate

MSI or MSI-X interrupts from both PFs and VFs. The Application Layer can generate legacy interrupts

from PFs only. The Application Layer should select one of the three types of interrupts, depending on the

support provided by the platform and the software drivers. Ground the input pins for the unused

interrupt types.

4-14

Interrupt Interface

UG-01097_sriov

2014.12.15

Altera Corporation

Interfaces and Signal Descriptions

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