Freescale Semiconductor DSP56366 - Manual (Page 166)

ESAI Programming Model
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
8-16 Freescale Semiconductor
2. If the data word is right-aligned (TWA=1), and zero padding is disabled (PADC=0), then the first
data bit is repeated before the transmission of the data word. If zero padding is enabled (PADC=1),
zeroes are transmitted before the transmission of the data word.
8.3.2.9 TCR Transmit Network Mode Control (TMOD1-TMOD0) - Bits 8-9
The TMOD1 and TMOD0 bits are used to define the network mode of ESAI transmitters according to
Table 8-4 . In the normal mode, the frame rate divider determines the word transfer rate – one word is
transferred per frame sync during the frame sync time slot, as shown in Figure 8-6 . In network mode, it is
possible to transfer a word for every time slot, as shown in Figure 8-6 . For more details, see Section 8.4,
"Operating Modes" .
In order to comply with AC-97 specifications, TSWS4-TSWS0 should be set to 00011 (20-bit slot, 20-bit
word length), TFSL and TFSR should be cleared, and TDC4-TDC0 should be set to $0C (13 words in
frame). If TMOD[1:0]=$11 and the above recommendations are followed, the first slot and word will be
16 bits long, and the next 12 slots and words will be 20 bits long, as required by the AC97 protocol.
Table 8-4 Transmit Network Mode Selection
TMOD1 TMOD0 TDC4-TDC0 Transmitter Network Mode
0 0 $0-$1F Normal Mode
0 1 $0 On-Demand Mode
0 1 $1-$1F Network Mode
1 0 X Reserved
1 1 $0C AC97