Freescale Semiconductor DSP56366 - Manual (Page 305)

JTAG BSDL
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor C-5
"28 (BC_1, *, control, 1)," &
"29 (BC_6, D(2), bidir, X, 28, 1, Z)," &
"30 (BC_6, D(1), bidir, X, 28, 1, Z)," &
"31 (BC_6, D(0), bidir, X, 28, 1, Z)," &
"32 (BC_1, A(17), output3, X, 35, 1, Z)," &
"33 (BC_1, A(16), output3, X, 35, 1, Z)," &
"34 (BC_1, A(15), output3, X, 35, 1, Z)," &
"35 (BC_1, *, control, 1)," &
"36 (BC_1, A(14), output3, X, 35, 1, Z)," &
"37 (BC_1, A(13), output3, X, 35, 1, Z)," &
"38 (BC_1, A(12), output3, X, 35, 1, Z)," &
"39 (BC_1, A(11), output3, X, 35, 1, Z)," &
-- num cell port func safe [ccell dis rslt]
"40 (BC_1, A(10), output3, X, 35, 1, Z)," &
"41 (BC_1, A(9), output3, X, 35, 1, Z)," &
"42 (BC_1, A(8), output3, X, 45, 1, Z)," &
"43 (BC_1, A(7), output3, X, 45, 1, Z)," &
"44 (BC_1, A(6), output3, X, 45, 1, Z)," &
"45 (BC_1, *, control, 1)," &
"46 (BC_1, A(5), output3, X, 45, 1, Z)," &
"47 (BC_1, A(4), output3, X, 45, 1, Z)," &
"48 (BC_1, A(3), output3, X, 45, 1, Z)," &
"49 (BC_1, A(2), output3, X, 45, 1, Z)," &
"50 (BC_1, A(1), output3, X, 45, 1, Z)," &
"51 (BC_1, A(0), output3, X, 45, 1, Z)," &
"52 (BC_1, BG_, input, X)," &
"53 (BC_1, *, control, 1)," &
"54 (BC_1, AA(0), output3, X, 53, 1, Z)," &
"55 (BC_1, *, control, 1)," &
"56 (BC_1, AA(1), output3, X, 55, 1, Z)," &
"57 (BC_1, RD_, output3, X, 68, 1, Z)," &
"58 (BC_1, WR_, output3, X, 68, 1, Z)," &
"59 (BC_1, *, control, 1)," &
-- num cell port func safe [ccell dis rslt]
"60 (BC_6, BB_, bidir, X, 59, 1, Z)," &
"61 (BC_1, BR_, output2, X)," &
"62 (BC_1, TA_, input, X)," &
"63 (BC_1, PINIT, input, X)," &
"64 (BC_1, *, control, 1)," &
"65 (BC_6, SCKR_1, bidir, X, 64, 1, Z)," &
"66 (BC_1, *, control, 1)," &
"67 (BC_6, FSR_1, bidir, X, 66, 1, Z)," &
"68 (BC_1, *, control, 1)," &
"69 (BC_1, EXTAL, input, X)," &
"70 (BC_1, *, control, 1)," &
"71 (BC_6, SCKT_1, bidir, X, 70, 1, Z)," &
"72 (BC_1, *, control, 1)," &
"73 (BC_1, CAS_, output3, X, 72, 1, Z)," &
"74 (BC_1, *, control, 1)," &
"75 (BC_1, AA(2), output3, X, 74, 1, Z)," &
"76 (BC_1, *, control, 1)," &
"77 (BC_6, FST_1, bidir, X, 76, 1, Z)," &
"78 (BC_1, *, control, 1)," &
"79 (BC_6, SDO50_1, bidir, X, 78, 1, Z)," &
-- num cell port func safe [ccell dis rslt]