Freescale Semiconductor DSP56366 User Manual

Page 276

Advertising
background image

Equates

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4

B-10

Freescale Semiconductor

M_DRS1 EQU 12 ;DMA Request Source bit 1

M_DRS2 EQU 13 ;DMA Request Source bit 2

M_DRS3 EQU 14 ;DMA Request Source bit 3

M_DRS4 EQU 15 ;DMA Request Source bit 4

M_DCON EQU 16 ; DMA Continuous Mode

M_DPR EQU $60000 ; DMA Channel Priority

M_DPR0 EQU 17 ; DMA Channel Priority Level (low)

M_DPR1 EQU 18 ; DMA Channel Priority Level (high)

M_DTM EQU $380000 ; DMA Transfer Mode Mask (DTM2-DTM0)

M_DTM0 EQU 19 ; DMA Transfer Mode 0

M_DTM1 EQU 20 ; DMA Transfer Mode 1

M_DTM2 EQU 21 ; DMA Transfer Mode 2

M_DIE EQU 22 ; DMA Interrupt Enable bit

M_DE EQU 23 ; DMA Channel Enable bit

; DMA Status Register

M_DTD EQU $3F ; Channel Transfer Done Status MASK (DTD0-DTD5)

M_DTD0 EQU 0 ; DMA Channel Transfer Done Status 0

M_DTD1 EQU 1 ; DMA Channel Transfer Done Status 1

M_DTD2 EQU 2 ; DMA Channel Transfer Done Status 2

M_DTD3 EQU 3 ; DMA Channel Transfer Done Status 3

M_DTD4 EQU 4 ; DMA Channel Transfer Done Status 4

M_DTD5 EQU 5 ; DMA Channel Transfer Done Status 5

M_DACT EQU 8 ; DMA Active State

M_DCH EQU $E00 ; DMA Active Channel Mask (DCH0-DCH2)

M_DCH0 EQU 9 ; DMA Active Channel 0

M_DCH1 EQU 10 ; DMA Active Channel 1

M_DCH2 EQU 11 ; DMA Active Channel 2

Advertising