Freescale Semiconductor DSP56366 - Manual (Page 202)

Introduction
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
9-2 Freescale Semiconductor
Figure 9-1 ESAI_1 Block Diagram
Clock / Frame Sync
Generators
and
Control Logic
SDO1_1 [PE10]
SDO0_1 [PE11]
Shift Register
RX0_1
TX5_1
SDO5_1/SDI0_1 [PE6]
Shift Register
RX1_1
TX4_1
SDO4_1/SDI1_1 [PE7]
Shift Register
RX2_1
TX3_1
SDO3_1/SDI2_1 [PE8]
Shift Register
RX3_1
TX2_1
SDO2_1/SDI3_1 [PE9]
Shift Register
TX1_1
Shift Register
TX0_1
DDB GDB
RSMA_1
RSMB_1
TSMA_1
TSMB_1
RCCR_1
RCR_1
TCCR_1
TCR_1
SAICR_1
SAISR_1
TSR_1
TCLK
RCLK
[P
E3] SCKT_1
[P
E0] SCKR
_1
[P
E1]
FSR_
1
(shared with SDO0 [PC11])
(shared with SDO1 [PC10])
(shared with SDO2/SDI3 [PC9])
(shared with SDO3/SDI2 [PC8])
[PE4
] FST_
1