Freescale Semiconductor DSP56366 User Manual

Page 285

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Equates

DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4

Freescale Semiconductor

B-19

; HSAR bits

M_HA6 EQU 23 ; SHI I2C Slave Address (HA6)

M_HA5 EQU 22 ; SHI I2C Slave Address (HA5)

M_HA4 EQU 21 ; SHI I2C Slave Address (HA4)

M_HA3 EQU 20 ; SHI I2C Slave Address (HA3)

M_HA1 EQU 18 ; SHI I2C Slave Address (HA1)

; control and status bits in HCSR

M_HBUSY EQU 22 ; SHI Host Busy (HBUSY)

M_HBER EQU 21 ; SHI Bus Error (HBER)

M_HROE EQU 20 ; SHI Receive Overrun Error (HROE)

M_HRFF EQU 19 ; SHI Receivr FIFO Full (HRFF)

M_HRNE EQU 17 ; SHI Receive FIFO Not Empty (HRNE)

M_HTDE EQU 15 ; SHI Host Transmit data Empty (HTDE)

M_HTUE EQU 14 ; SHI Host Transmit Underrun Error (HTUE)

M_HRIE1 EQU 13 ; SHI Receive Interrupt Enable (HRIE1)

M_HRIE0 EQU 12 ; SHI Receive Interrupt Enable (HRIE0)

M_HTIE EQU 11 ; SHI Transmit Interrupt Enable (HTIE)

M_HBIE EQU 10 ; SHI Bus-Error Interrupt Enable (HBIE)

M_HIDLE EQU 9 ; SHI Idle (HIDLE)

M_HRQE1 EQU 8 ; SHI Host Request Enable (HRQE1)

M_HRQE0 EQU 7 ; SHI Host Request Enable (HRQE0)

M_HMST EQU 6 ; SHI Master Mode (HMST)

M_HFIFO EQU 5 ; SHI FIFO Enable Control (HFIFO)

M_HCKFR EQU 4 ; SHI Clock Freeze (HCKFR)

M_HM1 EQU 3 ; SHI Serial Host Interface Mode (HM1)

M_HM0 EQU 2 ; SHI Serial Host Interface Mode (HM0)

M_HI2C EQU 1 ; SHI I2c/SPI Selection (HI2C)

M_HEN EQU 0 ; SHI Host Enable (HEN)

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