Freescale Semiconductor DSP56366 - Manual (Page 241)

Timer/Event Counter Programming Model
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 11-11
The DO bit is cleared by the hardware RESET signal or the software RESET instruction.
This bit is not in use for timers 1 and 2. It should be left cleared.
11.3.4.10 TCSR Prescaler Clock Enable (PCE) Bit 15
The PCE bit is used to select the prescaler clock as the timer source clock. When the PCE bit is cleared,
the timer uses either an internal (CLK/2) signal or an external signal (TIO0) as its source clock. When the
PCE bit is set, the prescaler output is used as the timer source clock for the counter regardless of the timer
operating mode. To ensure proper operation, the PCE bit should be changed only when the timer is
disabled (when the TE bit is cleared). Which source clock is used for the prescaler is determined by the
PS[1:0] bits of the TPLR. Timers 1 and 2 can be clocked by the prescaler clock derived from TIO0.
11.3.4.11 TCSR Timer Overflow Flag (TOF) Bit 20
The TOF bit is set to indicate that counter overflow has occurred. This bit is cleared by writing a 1 to the
TOF bit. Writing a 0 to the TOF bit has no effect. The bit is also cleared when the timer overflow interrupt
is serviced.
The TOF bit is cleared by the hardware RESET signal, the software RESET instruction, the STOP
instruction, or by clearing the TE bit to disable the timer.
11.3.4.12 TCSR Timer Compare Flag (TCF) Bit 21
The TCF bit is set to indicate that the event count is complete. In the timer, PWM, and watchdog modes,
the TCF bit is set when (N – M + 1) events have been counted (N is the value in the compare register and
M is the TLR value). In the measurement modes, the TCF bit is set when the measurement has been
completed.
The TCF bit is cleared by writing a one into the TCF bit. Writing a zero into the TCF bit has no effect. The
bit is also cleared when the timer compare interrupt is serviced.
The TCF bit is cleared by the hardware RESET signal, the software RESET instruction, the STOP
instruction, or by clearing the TE bit to disable the timer.
NOTE
The TOF and TCF bits are cleared by writing a one to the specific bit. In
order to assure that only the desired bit is cleared, do not use the BSET
command. The proper way to clear these bits is to write (using a MOVEP
instruction) a one to the flag to be cleared and a zero to the other flag.
11.3.4.13 TCSR Reserved Bits (Bits 3, 10, 14, 16-19, 22, 23)
These reserved bits are read as zero and should be written with zero for future compatibility.