Freescale Semiconductor DSP56366 - Manual (Page 53)

Enhanced Serial Audio Interface_1
DSP56366 24-Bit Digital Signal Processor User Manual, Rev. 4
Freescale Semiconductor 2-19
2.10 Enhanced Serial Audio Interface_1
Table 2-12 Enhanced Serial Audio Interface_1 Signals
Signal
Name
Signal Type
State during
Reset
Signal Description
FSR_1 Input or output GPIO
disconnected
Frame Sync for Receiver_1 — This is the receiver frame sync
input/output signal. In the asynchronous mode (SYN=0), the FSR pin
operates as the frame sync input or output used by all the enabled
receivers. In the synchronous mode (SYN=1), it operates as either the
serial flag 1 pin (TEBE=0), or as the transmitter external buffer enable
control (TEBE=1, RFSD=1).
When this pin is configured as serial flag pin, its direction is determined
by the RFSD bit in the RCCR register. When configured as the output
flag OF1, this pin will reflect the value of the OF1 bit in the SAICR
register, and the data in the OF1 bit will show up at the pin synchronized
to the frame sync in normal mode or the slot in network mode. When
configured as the input flag IF1, the data value at the pin will be stored
in the IF1 bit in the SAISR register, synchronized by the frame sync in
normal mode or the slot in network mode.
PE1 Input, output, or
disconnected
Port E 1—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input cannot tolerate 5 V.
FST_1 Input or output GPIO
disconnected
Frame Sync for Transmitter_1—This is the transmitter frame sync
input/output signal. For synchronous mode, this signal is the frame sync
for both transmitters and receivers. For asynchronous mode, FST is the
frame sync for the transmitters only. The direction is determined by the
transmitter frame sync direction (TFSD) bit in the ESAI transmit clock
control register (TCCR).
PE4 Input, output, or
disconnected
Port E 4—When the ESAI is configured as GPIO, this signal is
individually programmable as input, output, or internally disconnected.
The default state after reset is GPIO disconnected.
This input cannot tolerate 5 V.