Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 140)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 140
VHDL API Overview
Creating Transactions
April 2014
Protocol fields hold transaction information that is transferred over the protocol signals. For
example, the prot field is transferred over the AWPROT protocol signals during a write
transaction.
Operational fields hold information about how and when the transaction is transferred. Their
content is not transferred over protocol signals. For example, the operation_mode field controls
the blocking/nonblocking operation of the transaction, but is not transferred over the protocol
signals.
Transaction Definition
The transaction record exists as a SystemVerilog class definition in each BFM. Example 7-1
shows the definition of the axi4_transaction class members that form the transaction record.
Example 7-1. AXI4-Lite Transaction Definition
// Global Transaction Class
class axi4_transaction;
// Protocol
axi4_rw_e read_or_write;
bit [((`MAX_AXI4_ADDRESS_WIDTH) - 1):0] addr;
axi4_prot_e prot;
bit [3:0] region; // Not supported in AXI4-Lite
axi4_size_e size; // Not supported in AXI4-Lite
axi4_burst_e burst; // Not supported in AXI4-Lite
axi4_lock_e lock; // Not supported in AXI4-Lite
axi4_cache_e cache; // Not supported in AXI4-Lite
bit [3:0] qos; // Not supported in AXI4-Lite
bit [((`MAX_AXI4_ID_WIDTH) - 1):0] id // Not supported in AXI4-Lite;
bit [7:0] burst_length;
bit [((`MAX_AXI4_USER_WIDTH) - 1):0] addr_user; // Not supported in
AXI4-Lite
bit [((((`MAX_AXI4_RDATA_WIDTH > `MAX_AXI4_WDATA_WIDTH) ?
`MAX_AXI4_RDATA_WIDTH : `MAX_AXI4_WDATA_WIDTH)) - 1):0] data_words [];
bit [(((`MAX_AXI4_WDATA_WIDTH / 8)) - 1):0] write_strobes [];
axi4_response_e resp[];
int address_valid_delay;
int data_valid_delay[];
int write_response_valid_delay;
int address_ready_delay;
int data_ready_delay[];
int write_response_ready_delay;
// Housekeeping
bit gen_write_strobes = 1'b1;
axi4_operation_mode_e operation_mode = AXI4_TRANSACTION_BLOCKING;
axi4_write_data_mode_e write_data_mode = AXI4_DATA_AFTER_ADDRESS;
bit data_beat_done[]; // Not supported in AXI4-Lite
bit transaction_done;
...
endclass