Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 348)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 348
VHDL Tutorials
Verifying a Master DUT
April 2014
process_write
The process_write process works in a similar way as previously described for process_read . It
uses unique path and queue identifiers to work concurrently with other processes, as shown in
Example 11-15 .
Example 11-15. process_write
-- process_write : write address phase through path 0
-- This process keep receiving write address phase and push the
-- transaction into queue through push_transaction_id API.
process
variable write_trans : integer;
begin
wait_on(AXI4_RESET_0_TO_1, index, axi4_tr_if_0(index));
wait_on(AXI4_CLOCK_POSEDGE, index, axi4_tr_if_0(index));
loop
create_slave_transaction(write_trans, index, axi4_tr_if_0(index));
get_write_addr_phase(write_trans, index, axi4_tr_if_0(index));
get_config(AXI4_CONFIG_NUM_OUTSTANDING_WR_PHASE,
tmp_config_num_outstanding_wr_phase, index,
AXI4_PATH_3, axi4_tr_if_0(index));
push_transaction_id(write_trans, AXI4_QUEUE_ID_0, index,
axi4_tr_if_0(index));
end loop;
wait;
end process;
handle_write
The handle_write process works in a similar way to that previously described for handle_read .
The main difference is that the write transaction handling gets the write data and stores it in the
slave test program
Internal Memory , and adhering to the state of the WSTRB write strobes
signals. There is an additional pop_transaction_id() into a queue so that the process can send a
write response phase for the transaction, as shown in Example 11-16 .