Get_data_ready_delay(), Example – Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite User Manual
Page 186
Mentor Verification IP AE AXI4-Lite User Guide, V10.3
186
VHDL Master BFM
get_data_ready_delay()
April 2014
get_data_ready_delay()
This nonblocking procedure gets the data_ready_delay field for a transaction that is uniquely
identified by the transaction_id field previously created by either the
Example
-- Create a write transaction with start address of 0.
-- Creation returns tr_id to identify the transaction.
create_write_transaction(0, tr_id, bfm_index, axi4_tr_if_0(bfm_index));
-- Get the write data channel WREADY delay the data
-- phase of the tr_id transaction.
get_data_ready_delay(data_ready_delay, tr_id, bfm_index,
axi4_tr_if_0(bfm_index));
Prototype
get_data_ready_delay
(
data_ready_delay: out integer;
transaction_id : in integer;
bfm_id : in integer;
path_id : in axi4_path_t; --optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments
data_ready_delay
Read data channel RREADY delay measured in ACLK cycles
for this transaction.
transaction_id
Transaction identifier. Refer to “
” on page 151 for more details.
bfm_id
BFM identifier. Refer to “
” on page 151 for more details.
path_id
(Optional) Parallel process path identifier:
AXI4_PATH_0
AXI4_PATH_1
AXI4_PATH_2
AXI4_PATH_3
AXI4_PATH_4
Refer to “
Overloaded Procedure Common Arguments
page 151 for more details.
tr_if
Transaction signal interface. Refer to “
” on page 151 for more details.
Returns
data_ready_delay