Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 81)

SystemVerilog Slave BFM
get_write_addr_cycle()
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 81
April 2014
get_write_addr_cycle()
This blocking task waits until the write address channel AWVALID signal is asserted.
Example
// Wait for a single write address cycle
bfm.get_write_addr_cycle();
Prototype task automatic get_write_addr_cycle();
Arguments None
Returns None