Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 66)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 66
SystemVerilog Slave BFM
Slave BFM Configuration
April 2014
AXI4_CONFIG_MAX_LATENCY_RVALID_
ASSERTION_TO_RREADY The maximum timeout duration from
the assertion of RVALID to the
assertion of RREADY in clock
periods (default 10000).
AXI4_CONFIG_MAX_LATENCY_BVALID_
ASSERTION_TO_BREADY The maximum timeout duration from
the assertion of BVALID to the
assertion of BREADY in clock
periods (default 10000).
AXI4_CONFIG_MAX_LATENCY_
WVALID_ASSERTION_TO_WREADY The maximum timeout duration from
the assertion of WVALID to the
assertion of WREADY in clock
periods (default 10000).
Master Attributes
Slave Attributes
AXI4_CONFIG_AXI4LITE_axi4 Configures the AXI4 slave BFM to be
AXI4-Lite compatible.
0 = disabled (default)
1 = enabled
AXI4_CONFIG_SLAVE_START_ADDR Configures the start address map for
the slave.
AXI4_CONFIG_SLAVE_END_ADDR Configures the end address map for
the slave.
AXI4_CONFIG_MAX_OUTSTANDING_WR Configures the maximum number of
outstanding write requests from the
master that can be processed by the
slave. The slave back-pressures the
master by setting the signal
AWREADY=0b0 if this value is
exceeded.
Default = 0.
AXI4_CONFIG_MAX_OUTSTANDING_RD Configures the maximum number of
outstanding read requests from the
master that can be processed by the
slave. The slave back-pressures the
master by setting the signal
ARREADY=0b0 if this value is
exceeded.
Default = 0.
Table 4-2. Slave BFM Configuration (cont.)
Configuration Field Description