Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 60)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 60
SystemVerilog Master BFM
execute_read_data_ready()
April 2014
execute_read_data_ready()
This task executes a read data ready by placing the ready argument value onto the RREADY
signal. It will block for one ACLK period.
Example
// Assert and deassert the RREADY signal
forever begin
bfm.execute_read_data_ready(1'b0);
bfm.wait_on(AXI4_CLOCK_POSEDGE);
bfm.wait_on(AXI4_CLOCK_POSEDGE);
bfm.execute_read_data_ready(1'b1);
bfm.wait_on(AXI4_CLOCK_POSEDGE);
end
Prototype task automatic execute_read_data_ready
(
bit ready
);
Arguments ready The value to be placed onto the RREADY signal
Returns None