Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 399)

VHDL Test Programs
AXI4-Lite VHDL Master BFM Test Program
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 399
April 2014
report "master_test_program: Writing data (4) to address (0)";
-- By default it will run in Blocking mode
execute_transaction(tr_id, index, axi4_tr_if_0(index));
--4 x Reads
--Read data from address 1.
create_read_transaction(1, tr_id, index, axi4_tr_if_0(index));
execute_transaction(tr_id, index, axi4_tr_if_0(index));
get_data_words(data_words, tr_id, index, axi4_tr_if_0(index));
if(data_words(15 downto 8) = x"01") then
report "master_test_program: Read correct data (1) at address (1)";
else
hwrite(lp, data_words(15 downto 8));
report "master_test_program: Error: Expected data (1) at address 1,
but got " & lp.all;
end if;
--Read data from address 2.
create_read_transaction(2, tr_id, index, axi4_tr_if_0(index));
execute_transaction(tr_id, index, axi4_tr_if_0(index));
get_data_words(data_words, tr_id, index, axi4_tr_if_0(index));
if(data_words(23 downto 16) = x"02") then
report "master_test_program: Read correct data (2) at address (2)";
else
hwrite(lp, data_words(23 downto 16));
report "master_test_program: Error: Expected data (2) at address 2,
but got " & lp.all;
end if;
--Read data from address 3.
create_read_transaction(3, tr_id, index, axi4_tr_if_0(index));
execute_transaction(tr_id, index, axi4_tr_if_0(index));
get_data_words(data_words, tr_id, index, axi4_tr_if_0(index));
if(data_words(31 downto 24) = x"03") then
report "master_test_program: Read correct data (3) at address (3)";
else
hwrite(lp, data_words(31 downto 24));
report "master_test_program: Error: Expected data (3) at address 3,
but got " & lp.all;
end if;
--Read data from address 0.
create_read_transaction(0, tr_id, index, axi4_tr_if_0(index));
execute_transaction(tr_id, index, axi4_tr_if_0(index));
get_data_words(data_words, tr_id, index, axi4_tr_if_0(index));
if(data_words(7 downto 0) = x"04") then
report "master_test_program: Read correct data (4) at address (0)";
else
hwrite(lp, data_words(7 downto 0));
report "master_test_program: Error: Expected data (4) at address 0,
but got " & lp.all;
end if;