Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 263)

VHDL Slave BFM
get_write_data_cycle()
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 263
April 2014
get_write_data_cycle()
This blocking procedure waits until the write data channel WVALID signal is asserted.
Example
// Wait for the WVALID signal to be asserted.
bfm.get_write_data_cycle(bfm_index, axi4_tr_if_0(bfm_index));
Prototype procedure get_write_data_cycle
(
bfm_id : in integer;
path_id : in axi4_adv_path_t; --optional
signal tr_if : inout axi4_vhd_if_struct_t
);
Arguments bfm_id BFM identifier. Refer to “ Overloaded Procedure Common Arguments ”
on page 151 for more details.
path_id (Optional) Parallel process path identifier:
AXI4_PATH_5
AXI4_PATH_6
AXI4_PATH_7
Refer to “ Overloaded Procedure Common Arguments ” on page 151 for
more details.
tr_if Transaction signal interface. Refer to “ Overloaded Procedure Common
Arguments ” on page 151 for more details.
Returns None