Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 380)

Mentor Verification IP AE AXI4-Lite User Guide, V10.3 380
AXI4-Lite Assertions
April 2014
AXI4-
60156 AXI4_UNALIGNED_ADDR_FOR_
WRAPPING_WRITE_BURST Wrapping bursts must have address
aligned to the start of the write
transfer. A3.4.1
AXI4-
60157 AXI4_WDATA_CHANGED_BEFORE_
WREADY_ON_INVALID_LANE On a lane whose strobe is 0, the
value of WDATA has changed from
its initial value between the time
WVALID was asserted and before
WREADY was asserted. A3.2.1
AXI4-
60158 AXI4_WDATA_CHANGED_BEFORE_
WREADY_ON_VALID_LANE On a lane whose strobe is 1, the
value of WDATA has changed from
its initial value between the time
WVALID was asserted and before
WREADY was asserted. A3.2.1
AXI4-
60159 AXI4_WLAST_CHANGED_BEFORE_
WREADY The value of WLAST has changed
from its initial value between the time
WVALID was asserted and before
WREADY was asserted. A3.2.1
AXI4-
60160 AXI4_WLAST_UNKN WLAST has an X value/WLAST has
a Z value.
AXI4-
60161 AXI4_WREADY_NOT_ASSERTED_
AFTER_WVALID Once WVALID has been asserted
WREADY should be asserted in
config_max_latency_WVALID_asser
tion_to_WREADY clock periods.
AXI4-
60062 AXI4_WREADY_UNKN WREADY has an X value/WREADY
has a Z value.
AXI4-
60163 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_12 The WA bit of the cache parameter
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60164 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_13 The WA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60165 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_4 The WA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60166 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_5 The WA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60167 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_8 The WA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60168 AXI4_WRITE_ALLOCATE_WHEN_NON_
MODIFIABLE_9 The WA of the cache parameter bit
should not be HIGH when the
Modifiable bit is LOW. A4.4
AXI4-
60169 AXI4_WRITE_BURST_LENGTH_
VIOLATION The number of data beats in a write
transfer should match the value
given by AWLEN.
Table A-1. AXI4 Assertions (cont.)
Error
Code Error Name Description Property
Ref