Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite User Manual

Page 374

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Mentor Verification IP AE AXI4-Lite User Guide, V10.3

374

AXI4-Lite Assertions

April 2014

AXI4-
60066

AXI4_BRESP_UNKN

BRESP has an X value/BRESP has
a Z value.

AXI4-
60067

AXI4_BUSER_CHANGED_BEFORE_BREADY

The value of BUSER has changed
from its initial value between the time
BVALID was asserted and before
BREADY was asserted.

A3.2.1

AXI4-
60068

AXI4_BUSER_UNKN

BUSER has an X value/BUSER has
a Z value.

AXI4-
60069

AXI4_BVALID_DEASSERTED_BEFORE_
BREADY

BVALID has been de-asserted
before BREADY was asserted.

A3.2.1

AXI4-
60070

AXI4_BVALID_HIGH_EXITING_RESET

BVALID should have been driven low
when exiting reset.

A3.1.2

AXI4-
60071

AXI4_BVALID_UNKN

BVALID has an X value/BVALID has
a Z value.

AXI4-
60072

AXI4_DEC_ERR_RESP_FOR_READ

No slave at the address for this read
transfer (signaled by
AXI4_DECERR).

AXI4-
60073

AXI4_DEC_ERR_RESP_FOR_WRITE

No slave at the address for this write
transfer (signaled by
AXI4_DECERR).

AXI4-
60074

AXI4_EXCLUSIVE_READ_ACCESS_
MODIFIABLE

The modifiable bit (bit 1 of the cache
parameter) should not be set for an
exclusive read access.

A7.2.4

AXI4-
60075

AXI4_EXCLUSIVE_READ_BYTES_
TRANSFER_EXCEEDS_128

Number of bytes in an exclusive read
transaction must be less than or
equal to 128.

A7.2.4

AXI4-
60076

AXI4_EXCLUSIVE_READ_BYTES_
TRANSFER_NOT_POWER_OF_2

Number of bytes of an exclusive read
transaction is not a power of 2.

A7.2.4

AXI4-
60077

AXI4_EXCLUSIVE_READ_LENGTH_
EXCEEDS_16

Exclusive read accesses are not
permitted to use a burst length
greater than 16.

A7.2.4

AXI4-
60078

AXI4_EXCLUSIVE_WR_ADDRESS_NOT_
SAME_AS_RD

Exclusive write does not match the
address of the previous exclusive
read to this id.

A7.2.4

AXI4-
60079

AXI4_EXCLUSIVE_WR_BURST_NOT_SAME_
AS_RD

Exclusive write does not match the
burst setting of the previous
exclusive read to this id.

A7.2.4

AXI4-
60080

AXI4_EXCLUSIVE_WR_CACHE_NOT_SAME_
AS_RD

Exclusive write does not match the
cache setting of the previous
exclusive read to this id (see the
ARM AXI4 compliance-checker
AXI4_RECM_EXCL_MATCH

assertion code).

AXI4-
60081

AXI4_EXCLUSIVE_WRITE_ACCESS_
MODIFIABLE

The modifiable bit (bit 1 of the cache
parameter) should not be set for an
exclusive write access.

A7.2.4

Table A-1. AXI4 Assertions (cont.)

Error
Code

Error Name

Description

Property
Ref

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