Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 383)

AXI4-Lite Assertions
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 383
April 2014
AXI4-
60205 AXI4_EXCLUSIVE_WRITE_BYTES_
TRANSFER_NOT_POWER_OF_2 Number of bytes of an exclusive
write transaction is not a power of 2. A7.2.4
AXI4-
60206 AXI4_UNALIGNED_ADDRESS_FOR_
EXCLUSIVE_WRITE Exclusive write accesses must have
address aligned to the total number
of bytes in the transaction. A7.2.4
AXI4-
60207 AXI4_RLAST_VIOLATION RLAST signal should be asserted
along with the final transfer of the
read data burst.
AXI4-
60208 AXI4_WLAST_ASSERTED_DURING_DATA_
PHASE_OTHER_THAN_LAST Wlast must only be asserted during
the last data phase. A3.4.1
Table A-1. AXI4 Assertions (cont.)
Error
Code Error Name Description Property
Ref