Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 341)

VHDL Tutorials
Verifying a Master DUT
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 341
April 2014
BFM Slave Test Program
The slave test program is a memory model that contains two APIs:
•
Basic Slave API Definition
The Basic Slave API Definition allows you to create a wide range of stimulus scenarios
to test a master DUT. This API definition simplifies the creation of slave stimulus based
on the default response of OKAY to master read and write transactions.
•
Advanced Slave API Definition .
The Advanced Slave API Definition allows you to create additional response scenarios
to transactions.
For a complete code listing of the slave test program, refer to “ AXI4-Lite VHDL Slave BFM
Test Program ” on page 401.
Basic Slave API Definition
The Basic Slave Test Program API contains the following elements:
•
Procedures m_wr_addr_phase_ready_delay and do_byte_write() that read and write a
byte of data to Internal Memory , respectively.
•
Procedures set_read_data_valid_delay() and set_wr_resp_valid_delay() to configure
the delay of the read data channel RVALID, and write response channel BVALID
signals, respectively.
•
Variables m_wr_addr_phase_ready_delay and m_rd_addr_phase_ready_delay to
configure the delay of the read/write address channel AWVALID/ARVALID signals,
and
m_wr_data_phase_ready_delay to configure the delay of the write response channel
BVALID signal.
Internal Memory
The internal memory for the slave is defined as an array of 8 bits, so that each byte of data is
stored as an address/data pair.
Example 11-7. Internal Memory
type memory_t is array (0 to 2**16-1) of std_logic_vector(7 downto 0);
shared variable mem : memory_t;