Handshake delay, Valid signal delay transaction fields – Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite User Manual

Page 148

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Mentor Verification IP AE AXI4-Lite User Guide, V10.3

148

VHDL API Overview
Operational Transaction Fields

April 2014

Handshake Delay

The delay between the *VALID and *READY handshake signals for each of the five protocol
channels is controlled in a BFM test program using execute_*_ready(), get_*_ready() and
get_*_cycle() procedures. The execute_*_ready() procedures place a value onto the *READY
signals, and the get_*_ready() procedures retrieve a value from the *READY signals. The
get_*_cycle() procedures wait for a *VALID signal to be asserted and are used to insert a delay
between the *VALID and *READY signals in the BFM test program.

For example, the master BFM test program code below inserts a specified delay between the
read channel RVALID and RREADY handshake signals using the execute_read_data_ready()
and get_read_data_cycle() procedures.

-- Set the RREADY signal to ‘0’.
execute_read_data_ready(0, 1, bfm_index, AXI4_PATH_6,

axi4_tr_if_6(bfm_index));

-- Wait for the RVALID signal to be asserted.
get_read_data_cycle(bfm_index, AXI4_PATH_6,

axi4_tr_if_6(bfm_index));

-- Add delay between RVALID and RREADY.
for i in 0 to 2 loop

wait_on(AXI4_CLOCK_POSEDGE, bfm_index, AXI4_PATH_6,

axi4_tr_if_6(bfm_index));

end loop;
execute_read_data_ready(1, 1, bfm_index, AXI4_PATH_6,

axi4_tr_if_6(bfm_index));

In this example, the bfm_index specifies the BFM.

*VALID Signal Delay Transaction Fields

The transaction record contains a *_valid_delay transaction field for each of the five protocol
channels to configure the delay value prior to the assertion of the *VALID signal for the
channel. The master BFM holds the delay configuration for the *VALID signals that it asserts,
and the slave BFM holds the delay configuration for the *VALID signals that it asserts.

Table 7-2

specifies which *_valid_delay fields are configured by the master and slave BFMs.

Table 7-2. Master and Slave *_valid_delay Configuration Fields

Signal

Operational Transaction Field

Configuration BFM

AWVALID

address_valid_delay

Master

WVALID

data_valid_delay

Master

BVALID

write_response_valid_delay

Slave

ARVALID

address_valid_delay

Master

RVALID

data_valid_delay

Slave

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