Altera Mentor Verification IP Altera Edition AMBA AXI4-Lite - Manual (Page 357)

Getting Started with Qsys and the BFMs
Setting Up Simulation from the Windows GUI
Mentor Verification IP AE AXI4-Lite User Guide, V10.3 357
April 2014
3. Qsys displays the connectivity of the selected example as shown in Figure 12-5 .
Figure 12-5. Show System With Qsys Interconnect
Note
If you are using VHDL, you must select each BFM and verify that the index number
specified for the BFM is correct. An information dialog displays the properties of the
BFM when you select it. Ensure that the specified BFM index is correct in this dialog. If
you do not know the correct index number, check the VHDL code for the BFM.