Freescale Semiconductor ColdFire MCF52210 - Manual (Page 139)

Power Management
MCF52211 ColdFire® Integrated Microcontroller Reference Manual, Rev. 2
Freescale Semiconductor 8-11
A wakeup event is required to exit a low-power mode and return to run mode. Wakeup events consist of
any of these conditions:
• Any type of reset
• Any valid, enabled interrupt request
Exiting from low-power mode via an interrupt request requires:
• An interrupt request whose priority is higher than the value programmed in the XLPM_IPL field
of the LPICR.
• An interrupt request whose priority higher than the value programmed in the interrupt priority
mask (I) field of the core’s status register.
• An interrupt request from a source which is not masked in the interrupt controller’s interrupt mask
register.
• An interrupt request which has been enabled at the module of the interrupt’s origin.
8.4.1.1 Run Mode
Run mode is the normal system operating mode. Current consumption in this mode is related directly to
the system clock frequency.
8.4.1.2 Wait Mode
Wait mode is intended to be used to stop only the CPU and memory clocks until a wakeup event is
detected. In this mode, peripherals may be programmed to continue operating and can generate interrupts,
which cause the CPU to exit from wait mode.
8.4.1.3 Doze Mode
Doze mode affects the CPU in the same manner as wait mode, except that each peripheral defines
individual operational characteristics in doze mode. Peripherals which continue to run and have the
capability of producing interrupts may cause the CPU to exit the doze mode and return to run mode.
Peripherals that are stopped restart operation on exit from doze mode as defined for each peripheral.
8.4.1.4 Stop Mode
Stop mode affects the CPU in the same manner as the wait and doze modes, except that all clocks to the
system are stopped and the peripherals cease operation.
Stop mode must be entered in a controlled manner to ensure that any current operation is properly
terminated. When exiting stop mode, most peripherals retain their pre-stop status and resume operation.
The following subsections specify the operation of each module while in and when exiting low-power
modes.
8.4.1.5 Peripheral Shut Down
Most peripherals may be disabled by software to cease internal clock generation and remain in a static
state. Each peripheral has its own specific disabling sequence (refer to each peripheral description for